https://www.anandtech.com/show/12677/tsmc-kicks-off-volume-production-of-7nm-...



TSMC last week announced that it had started high volume production (HVM) of chips using their first-gen 7 nm (CLN7FF) process technology. The contract maker of semiconductors says it has over a dozen of customers with tens of designs eager to use the technology to make their integrated circuits.

The 7 nm node is a big deal for the foundry industry in general and TSMC in particular. When compared to the CLN16FF+ technology (TSMC’s most widely used FinFET process technology) the CLN7FF will enable chip designers to shrink their die sizes by 70% (at the same transistor count), drop power consumption by 60%, or increase frequency by 30% (at the same complexity). So far, TSMC has taped out 18 customer products using the CLN7FF technology, more than 50 CLN7FF products will be taped out by the end of 2018.

CLN7FF is expected to be used to build CPUs, GPUs, FPGAs, neural network processors, cryptocurrency mining accelerators, mobile SoCs and so on. This is important because demand for smartphones is slowing down and TSMC needs other customers to offset lower orders for mobile SoCs.

“So far, we have already favored out more than 18 customer products with good yield [and] performance,” said C. C. Wei, a Co-CEO and President of TSMC, during a conference call with financial analysts. “More than 50 products tape-outs has been planned by end of this year from applications across mobile, server CPU, network processor, gaming, GPU, PGA, cryptocurrency, automotive and AI. Our 7nm is already in volume production.”

TSMC’s CLN7FF process technology will rely on deep ultraviolet (DUV) lithography with argon fluoride (ArF) excimer lasers operating on a 193 nm wavelength. As a result, the world’s largest contract maker of semiconductors will be able to use existing manufacturing tools to make 7nm chips. Meanwhile, to keep using DUV lithography the company and its customers have to use multipatterning (triple and quadruple patterning), which increases design and production costs as well as product cycles.


So, this year we got the first generation CLN7FF process technology that uses deep ultraviolet (DUV) lithography with argon fluoride (ArF) excimer lasers operating on a 193 nm wavelength in a 3 & 4 layer deep masking process.  Somewhat slow and old school in the multi-masking aspects, but 7nm first gen has arrived and it was successful for 18 customer layouts and several LARGE very real production runs with good yields -- but at a high production cost.

Next year there will be a EUV CLN7FF+ process that will do away with the expensive triple and quadruple patterning and speed up the production process by direct burning the substrate (cut production costs a lot further).   So, this announcement really says Apple paid out the arse big time to develop the very first generation 7nm process line, got and used their gen 1 7nm process for 2017-18, ran off all their Apple stuff off on it and now that original 7nm gen 1 process line is sitting there idle ready for general use.  

Apple also is paying to develop the next generation EUV CLN7FF+ process line and Apple is currently running their 2019 products off of the gen 2 line as we speak.

But note please, the real "move the world" TSMC 7nm roll out for Johnny Everybody will be next year using this EUV CLN7FF+ gen 2 process lines at a much lower production complexity and cost posture.  



And yes, Intel has indeed failed at 10nm yet again  ---  failed to make a shipable large scale run off their 4 years developmentally belated 10nm process.   The only thing that has actually shipped in any volume from 10nm Intel is a rework of the mass of 4 and 8 core production trial run chips left over from the last couple of attempts, reworked by cutting off traces and counting only 2-6 out of the 4-8 cores as usable.  

Intel is getting closer though, with real "actually use the stuff" 10nm production runs planned for later on this year.

By the time Intel gets their 10nm multi-mask process right, TSMC will be on 2nd generation EUV CLN7FF+ direct burn process at a much lower production complexity and cost posture.

They've been writing horribly bloated code for so many years, who's gonna teach them how to unbloat it all?

All the guys that used to program in assembler and count clock cycles to increase throughput are gone.

The wave of programmers that is in now are the ones that have always used high level languages and compiled their programs.  If it gets too slow, just require a faster processor as the base system requirement. Easy.  Now they are going to have to learn a whole different mindset to programming and make choices of commands used based on execution times.  This might take a while. I hope they don't just start using the AI as a crutch.

Speaking of really big burning handwriting up on the wall ......  Intel really is being "Apple cored" and bung screwed in the resulting core hole.

https://www.google.com/search?q=apple+replaces+intel&oq=apple+replaces+intel&...

There are dozens of different write ups here from lots of different perspectives, Bloomberg is the Financial viewpoint and ArsTechnica is the hard core computing tech perspective.

3 quick things that became REALITY this week.

First and Second generation 7nm TSMC are both taking and making real production orders right now (Apple's lock out is still active on 2nd gen TSMC at this point in time).   AMD is making video cores and CPUs at TSMC right now at 7nm.

TSMC has started pouring the foundation for their 3nm building ......

TSMC has completed the 5nm building's frame and roof and electrical/water/HVAC on their 5nm building and are now installing the very first 5nm ASLM lines in the new facility.

Both TSMC, Samsung and Global are claiming their separate, slightly different developmental 5nm memory production processes "are going well at good yields".    People have actually seen 5nm memory samples from TSMC and Samsung ......  

Global is acting all shaky again, with AMD actually moving some planned items over to TSMC as we speak --- look for Global to seek an IBM or Samsung partnership or for some other form of technical assistance.

TSMC says they have an early 3nm developmental memory trial run "imminent".   TSMC is peddling 5nm memory regularly now as the lines are seen as stable.    TSMC is the only player with the funds (enough Apple money) to push on through to 3nm inside the next 5 years.   Apple's iPhone X is faltering though as the $1,000+ price tag is jest too too durn high for real people to pay just for "a next year's phone" .....

TSMC is spending $14 billion per year of Apple dollars and their own dollars to continue pushing smaller and smaller and smaller on a firm, yearly Apple schedule.   This money flow may end with 5nm because Apple doesn't have it to spend due to a "bad selling season".

No one has brought forth any plans for anything past 3nm as 3nm "gate all around" is really pushing all known silicon technologies to the wall, completely.

Before Intel makes their next proposed attempt at a very very belated 10nm production run all their 3 main competitors will have their 7nm up and running production and their 5nm developmental processes will be making memory just as fast as they can run it during production debugging.

Intel is going to be ~ Four TSMC Generations ~ back by the end of next year.

     (that's like 12 Intel generations, if you counted generations the way Intel counts them, of course)